Memory-mapped I/O ports on CX II and Main Page: Difference between pages

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Not all parts have been discovered and researched yet, so the information on this page is not complete.
Welcome to you on Hackspire, the TI-Nspire Hacking wiki.
The goal of this wiki is to federate all research efforts about the Texas Instruments's TI-Nspire calculator series.


==00000000 - Boot1 ROM==
Feel free to add your contribution, the more details we get, the better software the community can create.
TI Software is great for mathematics, physics, ... but independent developers are needed for all the rest, because TI does not have time for it!
__NOTOC__


128kB of on-chip ROM.
== Site news ==


==10000000 - SDRAM==
{|
| '''June 21, 2019'''  || ''' ([[User:Jim Bauwens|Jim Bauwens]]):'''  || The Hackspire wiki is back online after a downtime of over a month due to a server failure
|-
| '''July 2, 2017'''  || '''  ([[User:Jim Bauwens|Jim Bauwens]]):''' || The Hackspire wiki is 10 years old today! Many thanks to all the contributors for making Hackspire what it is today!
|-
| '''June 15, 2016'''  || ''' ([[User:Jim Bauwens|Jim Bauwens]]):'''  || hackspire.org is now the main domain name
|-
| '''March 10, 2016''' || ''' ([[User:Jim Bauwens|Jim Bauwens]]):'''  || hosting on new server
|}


64 MiB, managed by 0x90120000.
== Pages ==


==90000000 - General Purpose I/O (GPIO)==
<div style="overflow-x:auto">
{| style="min-width: 700px; width: 100%; line-height:1.5em; border-spacing:20px 0px; margin-top: 1em;"
|- style="text-align:left; background-color:#EEEEFF;"
! style="width:20%; padding:0 1em;"|Projects, programs and tools
! style="width:20%; padding:0 1em;"|Ndless
! style="width:20%; padding:0 1em;"|Development resources
! style="width:20%; padding:0 1em;"|OS information
! style="width:20%; padding:0 1em;"|Miscellaneous
|- style="color:black; vertical-align:top;"
|
*[[Emulators]]
*[[Lua Programs]]
*[[Linux]]
|
*[[Ndless]]
*[[Ndless features and limitations]]
*[[C and assembly development introduction]]
*[[libndls|libndls - TI-Nspire-specific library]]
*[[Syscalls|Syscalls and standard libraries]]
*[[Zehn]]
*[[CAS Programming]]
*[[Debugging programs]]
|
*[[Lua Programming]]
*[[Memory-mapped I/O ports]]
*[[Virtual Memory]]
*[[Clock speed]]
*[[Keypads]]
*[[Interrupts]]
*[[Hardware]]
*[[Jazelle]]
|
*[[Operating System]]
*[[OS upgrade files]]
*[[TNS File Format]]
*[[Document management]]
*[[TI-84 Plus Emulation]]
*[[Internal Filesystem]]
*[[NAND Memory Layout]]
*[[USB Protocol]]
|
*[[Site History]]
*[[Miscellaneous Information]]
*[[TI-Nspire CAS Software]]
*[[Links]]
|}
</div>


See [[GPIO Pins]]
== Registering / Contacting the Hackspire administration ==


==90010000 - Fast timer==
If you would like to register on Hackspire or contact the administration team you can do so by sending a mail to 'admin' on hackspire.org.


The same interface as 900C0000/900D0000, see [[#900D0000 - Second timer|Second timer]].
Don't forget to '''add''' the name of this wiki in your message '''subject''', and clearly mention what your request is and why, otherwise your e-mail will be ignored.


==90020000 - Serial UART==
== Other TI-Nspire developer communities ==
===Forums and News sites===
Although not specific to the TI-Nspire, these web sites are visited by many TI-Nspire hackers and developers.


[http://infocenter.arm.com/help/topic/com.arm.doc.ddi0183f/DDI0183.pdf PL011].
[https://codewalr.us CodeWalrus] ([https://codewalr.us/index.php?action=forum forum]) (English spoken)


==90030000 - Unknown==
[https://tiplanet.org TI-Planet] ([https://tiplanet.org/forum/index.php forum]) (French spoken)


Probably some kind of hash/crypto thing.
[https://www.omnimaga.org Omnimaga] ([https://www.omnimaga.org/index.php?action=forum forum]) (least active - English spoken)


==90040000 - SPI controller==
===Independent TI-Nspire Developers IRC channels===
General discussion: <code>#inspired at efnet.xs4all.nl:6667</code> (SSL on port 6697), or another server listed on http://www.efnet.org/?module=servers .


FTSSP010 SPI controller connected to the LCD.
More specifically aimed at Lua programming: <code>#nspire-lua at efnet.xs4all.nl:6667</code> (SSL on port 6697), or another server listed on http://www.efnet.org/?module=servers .


==90060000 - Watchdog timer==
==Disclaimer==
 
Hackspire is in no way affiliated with Texas Instruments Inc., or any of its subsidiaries. All data included in or accessible from the wiki is provided "as is" and without warranties of any kind. We do not guarantee the accuracy of it and any use is at own risk.
Possibly an [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0270b/index.html ARM SP805] or compatible.
 
==90070000 - Second Serial UART==
 
[http://infocenter.arm.com/help/topic/com.arm.doc.ddi0183f/DDI0183.pdf PL011].
 
==90080000 - Unknown==
 
Unknown. Probably an FTSSP010 as well.
 
==90090000 - Real-Time Clock (RTC)==
 
Similar to the [http://infocenter.arm.com/help/topic/com.arm.doc.ddi0224b/index.html ARM PrimeCell PL031], but interrupt registers are different.
 
* 90090000 (R): Current time, increments by 1 every second.
* 90090004 (R/W): Alarm value. When the time passes this, interrupt becomes active.
* 90090008 (R/W): Sets the value of 90090000 (clock will not read new time until a couple seconds later). Reads last value written.
* 9009000C (R/W): Interrupt mask (1-bit)
* 90090010 (R/W): Masked interrupt status, reads 1 if interrupt active and mask bit is set. Write 1 to acknowledge.
* 90090014 (R): Status
** Bit 0: Time setting in progress
** Bit 1: Alarm setting in progress
** Bit 2: Interrupt acknowledgment in progress
** Bit 3: Interrupt mask setting in progress
 
==900A0000 - Miscellaneous==
 
Seems to be similar to CX and Classic, except for the model ID at 900A0000 which is now 0x202.
 
==900B0000 - ADC==
 
A Faraday FTADCC010.
 
==900C0000 - First timer==
 
Same port structure as [[#900D0000 - Second timer|Second timer]].
 
==900D0000 - Second timer==
 
Timer is a [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0271d/Babehiha.html SP804].
 
==900E0000 - Keypad controller==
 
See also [[Keypads]] for information about the keypads themselves.
 
* 900E0000 (R/W):
** Bits 0-1: Scan mode
*** Mode 0: Idle.
*** Mode 1: Indiscriminate key detection. Data registers are not updated, but whenever any key is pressed, interrupt bit 2 is set (and cannot be cleared until the key is released).
*** Mode 2: Single scan. The keypad is scanned once, and then the mode returns to 0.
*** Mode 3: Continuous scan. When scanning completes, it just starts over again after a delay.
** Bits 2-15: Number of APB cycles to wait before scanning each row
** Bits 16-31: Number of APB cycles to wait between scans
* 900E0004 (R/W):
** Bits 0-7: Number of rows to read (later rows are not updated in 900E0010-900E002F, and just read as whatever they were before being disabled)
** Bits 8-15: Number of columns to read (later column bits in a row are set to 1 when it is updated)
* 900E0008 (R/W): Keypad interrupt status/acknowledge (3-bit). Write "1" bits to acknowledge.
** Bit 0: Keypad scan complete
** Bit 1: Keypad data register changed
** Bit 2: Key pressed in mode 1
* 900E000C (R/W): Keypad interrupt mask (3-bit). Set each bit to 1 if the corresponding event in [900E0008] should cause an interrupt.
* 900E0010-900E002F (R): Keypad data, one halfword per row.
* 900E0030-900E003F (R/W): Keypad GPIOs. Each register is 20 bits, with one bit per GPIO. The role of each register is unknown.
* 900E0040 (R/W): Interrupt enable. Bits unknown but seems to be related to touchpad. Causes interrupt on touchpad touched.
* 900E0044 (R/W): Interrupt status. Bits unknown. Write 1s to acknowledge.
* 900E0048 (R/W): Unknown
 
==90120000 - SDRAM Controller==
 
An FTDDR3030.
 
==90130000 - Unknown Controller for the LCD Backlight==
 
The OS controls the LCD backlight by writing to 90130018.
 
==90140000 - Power management==
 
A new "Aladdin PMU" unit. Not much known.
 
==A4000000 - Internal SRAM==
 
0x40000 bytes SRAM, managed by the controller at ?.
 
==A8000000 - Internal SRAM==
 
0x25800 bytes SRAM for an LCD framebuffer, managed by the controller at ?. It might be bigger in reality, but the OS only ever accesses 320*240*2 Bytes.
 
==B8000000 - SPI NAND controller==
 
An FTSPI020 with a MICRON 1Gb flash at CS 1.
 
==C0000000 - LCD controller==
 
A [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0293c/index.html PL111].
 
==C8010000 - Triple DES encryption==
 
Implements the [http://en.wikipedia.org/wiki/Triple_DES Triple DES encryption algorithm].
 
* C8010000 (R/W): Right half of block
* C8010004 (R/W): Left half of block. Writing this causes the block to be encrypted/decrypted.
* C8010008 (R/W): Right 32 bits of key 1
* C801000C (R/W):
** Bits 0-23: Left 24 bits of key 1
** Bit 30: Set to 0 to encrypt, 1 to decrypt
* C8010010 (R/W): Right 32 bits of key 2
* C8010014 (R/W): Left 24 bits of key 2
* C8010018 (R/W): Right 32 bits of key 3
* C801001C (R/W): Left 24 bits of key 3
 
==CC000000 - SHA-256 hash generator==
 
Implements the [http://en.wikipedia.org/wiki/SHA_hash_functions SHA-256 hash algorithm], which is used in cryptographic signatures.
 
* CC000000 (R): Busy if bit 0 set
* CC000000 (W): Write 0x10 and then 0x0 to initialize. Write 0xA to process first block, 0xE to process subsequent blocks
* CC000008 (R/W): Some sort of bus write-allow register? If a bit is set, it allows R/W access to the registers of the peripheral, if clear, R/O access only. Don't know what it's doing here, but it's here anyway.
** Bit 8: [[#CC000000 - SHA-256 hash generator]]
** Bit 10: ?
* CC000010-CC00004F (R/W): 512-bit block
* CC000060-CC00007F (R): 256-bit state
 
==DC000000 - Interrupt controller==
See [[Interrupts]]. The controller is a [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0181e/index.html PL190].

Latest revision as of 18:10, 4 July 2019

Welcome to you on Hackspire, the TI-Nspire Hacking wiki. The goal of this wiki is to federate all research efforts about the Texas Instruments's TI-Nspire calculator series.

Feel free to add your contribution, the more details we get, the better software the community can create. TI Software is great for mathematics, physics, ... but independent developers are needed for all the rest, because TI does not have time for it!


Site news

June 21, 2019 (Jim Bauwens): The Hackspire wiki is back online after a downtime of over a month due to a server failure
July 2, 2017 (Jim Bauwens): The Hackspire wiki is 10 years old today! Many thanks to all the contributors for making Hackspire what it is today!
June 15, 2016 (Jim Bauwens): hackspire.org is now the main domain name
March 10, 2016 (Jim Bauwens): hosting on new server

Pages

Projects, programs and tools Ndless Development resources OS information Miscellaneous

Registering / Contacting the Hackspire administration

If you would like to register on Hackspire or contact the administration team you can do so by sending a mail to 'admin' on hackspire.org.

Don't forget to add the name of this wiki in your message subject, and clearly mention what your request is and why, otherwise your e-mail will be ignored.

Other TI-Nspire developer communities

Forums and News sites

Although not specific to the TI-Nspire, these web sites are visited by many TI-Nspire hackers and developers.

CodeWalrus (forum) (English spoken)

TI-Planet (forum) (French spoken)

Omnimaga (forum) (least active - English spoken)

Independent TI-Nspire Developers IRC channels

General discussion: #inspired at efnet.xs4all.nl:6667 (SSL on port 6697), or another server listed on http://www.efnet.org/?module=servers .

More specifically aimed at Lua programming: #nspire-lua at efnet.xs4all.nl:6667 (SSL on port 6697), or another server listed on http://www.efnet.org/?module=servers .

Disclaimer

Hackspire is in no way affiliated with Texas Instruments Inc., or any of its subsidiaries. All data included in or accessible from the wiki is provided "as is" and without warranties of any kind. We do not guarantee the accuracy of it and any use is at own risk.