User contributions for Vogtinator
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7 March 2020
- 18:4718:47, 7 March 2020 diff hist +177 Memory-mapped I/O ports on CX II VRAM is magic
- 18:4318:43, 7 March 2020 diff hist +153 Memory-mapped I/O ports on CX Add 90040000
26 October 2019
- 18:2118:21, 26 October 2019 diff hist +161 Memory-mapped I/O ports on CX II Add FTDMAC020
10 October 2019
- 16:4216:42, 10 October 2019 diff hist +63 USB Protocol Document long packets
31 August 2019
- 16:0816:08, 31 August 2019 diff hist +34 GPIO Pins Add port 20 for CX current
- 15:0015:00, 31 August 2019 diff hist +215 Memory-mapped I/O ports on CX II Add USB controller locations
17 July 2019
- 19:3919:39, 17 July 2019 diff hist +569 Memory-mapped I/O ports on CX II Add some info about PMU registers
3 July 2019
- 19:1319:13, 3 July 2019 diff hist −2 Memory-mapped I/O ports on CX II →900B0000 - ADC
- 17:1217:12, 3 July 2019 diff hist +71 NAND Memory Layout Add note for the CX II
- 17:0517:05, 3 July 2019 diff hist +12 Keypads Mention CX/CM/CX II as well
- 17:0517:05, 3 July 2019 diff hist +29 Memory-mapped I/O ports Add CX II link current
- 17:0417:04, 3 July 2019 diff hist +5,956 N Memory-mapped I/O ports on CX II Create page
2 August 2015
- 23:1523:15, 2 August 2015 diff hist +125 C and assembly development introduction Add cygwin deps
- 18:2118:21, 2 August 2015 diff hist +382 C and assembly development introduction Add Mac and Win stubs, clean up a bit
20 July 2015
- 13:3313:33, 20 July 2015 diff hist +124 Clock speed Use nspire_emu's clock calculations current
17 July 2015
- 22:2422:24, 17 July 2015 diff hist −34,872 Memory-mapped I/O ports Seperated CX and classic
- 22:2222:22, 17 July 2015 diff hist +30,042 Memory-mapped I/O ports on Classic No edit summary
- 22:2122:21, 17 July 2015 diff hist −48 NAND Memory Layout on Classic Blanked the page current
- 22:2122:21, 17 July 2015 diff hist +48 N NAND Memory Layout on Classic moved NAND Memory Layout on Classic to Memory-mapped I/O ports on Classic
- 22:2122:21, 17 July 2015 diff hist 0 m Memory-mapped I/O ports on Classic moved NAND Memory Layout on Classic to Memory-mapped I/O ports on Classic