Hardware

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The chips are the same on the TI-Nspire and the TI-Nspire CAS.

PCB

Here are some hi-res PCB images, provided by bloo: [1], [2], [3]

Connector J04

As can be seen on the above image, there are empty pads for a connector labelled "J04". Maybe, there are signals to get a little bit further into the calculator.

I've analyzed the signals on the pins and found out a little about the types of signals.

"GND" means signal ground, it has the same potential as the whole ground plane on the PCBs. The minus pole of one battery is directly connected to it. "Vcc 3.3V" means the 3.3V power supply of the calculator. It seems to be present even if the calculator is off. "Floating" is a signal with an undefined voltage level, this state is very likely for inputs. "High" is a signal with almost 3.3V, but not a supply signal. These signals are probably inputs with pull-up resistors (they can be pulled-down with a large value resistor).

GND 1 2 GND
Vcc 3.3V 3 4 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
High 5 6 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
High 7 8 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
Floating 9 10 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
GND 11 12 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
GND 13 14 GND
Floating 15 16 Floating
Floating 17 18 GND
Floating 19 20 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
Floating 21 22 Square-wave: 112Hz, 99% duty-cycle, not present if the calc is off
Floating 23 24 RS232 Output (115'200,8,n,1)
Floating 25 26 RS232 Input
GND 27 28 GND
GND 29 30 GND

TODO: Double-check the results and find out, what these signals (Floating, High, Square-wave) really are. Maybe, there are common interfaces as JTAG, I2C or whatever.

RS232

A serial (RS232) adapter can be connected from a computer to the following pins of the external connector (pin 1 is the one at the left-hand side, TI-Nspire upside down, connector at the bottom):

  • Vcc : pin 2
  • Rx : pin 3
  • Tx : pin 4
  • GND : pin 5

The schematic of the circuit can be similar to this one: http://wiki.gp2x.org/wiki/Serial_cable

The configuration of the terminal on the computer side should be:

  • Baud rate = 115200
  • Data = 8 bit
  • Parity = none
  • Stop = 1 bit
  • Flow control = none

While starting up, the calculator sends some logging information through the interface. A log (including deletion and reprogramming the OS) can be found here).

Different types of files can be send with the X-Modem protocol, depending on the boot startup options chosen with the key combos. Windows HyperTerminal or TeraTerm strangely couldn't be used for the X-Modem transfer. lrzsz is a better alternative, which can be built on Windows with Cygwin.

stty -F /dev/ttyS0 115200 -evenp -cstopb
cat < /dev/ttyS0
# Abort with Ctrl+C when the X-Modem transfer begins
# The `cat` is used to show the startup logs during reboot
./lsz -X boot2.img <> /dev/ttyS0 >&0; cat /dev/ttyS0


Power supply

You can use the TI-Nspire with an external power supply (5V to 6V) instead of the batteries. Use pads P1 for V+ and P2 for GND. It will boot, but print "Critical voltage detected. Forcing shutdown." on RS232 and shutdown. It seems that the battery voltage of measured using only 2 batteries. A workaround is to use two resistors (100K work) to set the middle point at half voltage.

Screen

240x320, 16 grayshades LCD screen.

CPU

Code: ...

Manufacturer: Texas Instruments

Model: TI-NSPIRE / L9A0702 / TI-NS2006A-0 / LSI LOGIC / ZEVIO / U 0714 / WYJ14052-1

(Seems to be the same one in TI-nspire CAS, 0702 and 0714 might be datestamps)

LSI Zevio 1020 product brief

CPU seems to be an ARM926EJ-S with ARM5 instruction set ( see Reference manual ). Commands of the link protocol report a frequency of 90 Mhz for both the TI-Nspire and the TI-Nspire CAS.

Die photos are now available, showing an in-house part number and dual CHIPIDEA cores.

SDRAM

Code: ...

Manufacturer: QIMONDA

Model: HYB18L256160BF-7.5 WV22400

Datasheet: Local mirror - Manufacturer site

Function: 32MB SDRAM (16bit bus)

Storage (?) memory

Code: ...

Manufacturer: ST

Model: NAND 256 / R3A2BZA6 / GK 0JF 8Y / CHN 88 711

Function: 32MB FLASH NAND (block access) memory

Notes: This memory does not support "Execute In Place" (XIP). If executable code is contained in this memory, it has to be copied in RAM first. Probably contains the Operating System, the documents and the invisible file system of the OS which needs to survive a reboot.

Boot1 and certificate memory

Code: ...

Manufacturer: Silicon Storage Technology

Model: 39WF400A 90-4C-B3KE

Datasheet: Local Mirror - Manufacturer site

Function : 512KB NOR FLASH (16bit bus, memory mapped)

Notes: Probably contains the boot code which loads the Operating System kept in the storage memory. As on previous calculator models with flash memory, contains code to receive a new Operating System. This memory would be read-only, only the storage memory would be written to. Another possible scenario is that the whole kernel (Nucleus RTOS) is stored here, and that OS updates do not include it (a two memories flashing seems unlikely), but in this case the kernel couldn't be updated.

Other

Real-Time Clock

The clock is correctly emulated in the TI-84 Plus mode of the TI-Nspire. Although the TI-Nspire OS doesn't display any clock as the TI-89 Titanium and the TI-84 Plus do, the TI-Nspire keeps track of time when the TI-84 Plus keypad is replaced by the TI-Nspire keypad, and then put back. We can be quite sure there is an RTC inside. It is also interesting to mention the XML tags dfmt (date format) and tfmt (time format) set to 1 in the factory settings (phoenix/syst/locales/en/settings/factory.zip/settings.xml of the compressed file system) in the OS file of both the TI-Nspire and the TI-Nspire CAS. These two parameters don't appear in the system settings dialog of the TI-Nspire OS, as it is the case for the tags curr and unit of settings.xml.

MMU

The TI-Nspire may have a Memory management unit, but we can't be sure for the moment. If it had one, the Nucleus MMU extension for Nucleus RTOS would probably be used. But since the TI-NSpire is not open for third-party development, would the protections offered by an MMU really needed?

More information