Hardware: Difference between revisions

From Hackspire
Jump to navigation Jump to search
(→‎Other: MMU)
(→‎MMU: Thoughts)
Line 59: Line 59:


===MMU===
===MMU===
The TI-Nspire may have a [http://en.wikipedia.org/wiki/Memory_management_unit Memory management unit], but we can't be sure for the moment.
The TI-Nspire may have a [http://en.wikipedia.org/wiki/Memory_management_unit Memory management unit], but we can't be sure for the moment. If it had one, the [http://www.acceleratedtechnology.com.tw/embedded/nuc_kernels.html Nucleus MMU] extension for Nucleus RTOS would probably be used. But since the TI-NSpire is not open for third-party development, would the protections offered by an MMU really needed?


==More information==
==More information==
*The [http://www.datamath.org/Graphing/NSpire.htm TI-Nspire] and [http://www.datamath.org/Graphing/NSpire_CAS.htm TI-Nspire CAS] in Datamath Calculator Musueum
*The [http://www.datamath.org/Graphing/NSpire.htm TI-Nspire] and [http://www.datamath.org/Graphing/NSpire_CAS.htm TI-Nspire CAS] in Datamath Calculator Musueum

Revision as of 11:14, 5 August 2007

PCB

Here are some hi-res PCB images, provided by bloo:

http://www.unsads.com/~squalyl/nspire/pics/nspire001.jpg

http://www.unsads.com/~squalyl/nspire/pics/nspire002.jpg

http://www.unsads.com/~squalyl/nspire/pics/nspire003.jpg

Screen

240x320, 16 grayshades LCD screen.

CPU

Code: ...

Manufacturer: Texas Instruments

Model: TI-NSPIRE / L9A0702 / TI-NS2006A-0 / LSI LOGIC / ZEVIO / U 0714 / WYJ14052-1

LSI Zevio 1020 product brief

CPU seems to be an ARM926EJ-S with ARM5 instruction set ( see Reference manual )

SDRAM

Code: ...

Manufacturer: QIMONDA

Model: HYB18L256160BF-7.5 WV22400

Datasheet: Local mirror - Manufacturer site

Function: 32MB SDRAM (16bit bus)

Storage (?) memory

Code: ...

Manufacturer: ST

Model: NAND 256 / R3A2BZA6 / GK 0JF 8Y / CHN 88 711

Function: 32MB FLASH NAND (block access) memory

Boot/Kernel(?) memory

Code: ...

Manufacturer: SST

Model: 39WF400A 90-4C-B3KE

Datasheet: Local Mirror - Manufacturer site

Function : 512KB NOR FLASH (16bit bus, memory mapped)

Other

Real-Time Clock

The clock is correctly emulated in the TI-84 Plus mode of the TI-Nspire. Although the TI-Nspire OS doesn't display any clock as the TI-89 Titanium and the TI-84 Plus do, the TI-Nspire keeps track of time when the TI-84 Plus keypad is replaced by the TI-Nspire keypad, and then put back. We can be quite sure there is an RTC inside. It is also interesting to mention the XML tags dfmt (date format) and tfmt (time format) set to 1 in the factory settings (phoenix/syst/locales/en/settings/factory.zip/settings.xml of the compressed file system) in the OS file of both the TI-Nspire and the TI-Nspire CAS. These two parameters don't appear in the system settings dialog of the TI-Nspire OS, as it is the case for the tags curr and unit of settings.xml.

MMU

The TI-Nspire may have a Memory management unit, but we can't be sure for the moment. If it had one, the Nucleus MMU extension for Nucleus RTOS would probably be used. But since the TI-NSpire is not open for third-party development, would the protections offered by an MMU really needed?

More information